The worklist blockers, and a solver that was quietly wrong about three of them

s_load_dwordx2, s_load_dwordx4, s_load_dwordx8 and s_mov_b64 now translate and run. Twenty-four execution tests, all against a real device. exp is refused with a reason rather than implemented - it needs a render target and there is no concept of one (D104).

The wide loads were meant to be the easy part, and they were not.

Their solved operand layouts were wrong, and looked fine. s_load_dwordx2 had solved to a six-bit destination and an eight-bit offset; s_load_dwordx4 to six and nine - against s_load_dword's seven and sixteen, from the same encoding with the same fields. Three samples each, and in every one the destination was under sixty-four and the offset under 0x141, so the narrow field explained them all.

Nothing flagged it. The generated file said samples = 3 and gave a layout, and a layout is a layout. It was only visible by putting the four side by side and noticing that instructions sharing an encoding disagreed about where their fields were. After adding high destinations, high bases and offsets at the top of the range, all four solve identically - which is what a shared encoding should look like, and what the narrow solve was hiding.

This is the fourth field to solve too narrow for want of a high sample, and the second in that same file. The lesson is not hard to state; the failure is that adding an opcode means adding its extremes, and the extremes are the part that is easy to leave until the layout looks plausible.

s_mov_b64 was unsolvable for two reasons, and the solver could name neither. It reported unsolved: SOP1:0x1 and stopped. Instrumenting it showed one operand with zero candidates - and zero candidates means no field anywhere explains every sample, which is the one outcome the solver cannot distinguish between "the probes are wrong" and "the field is not there".

The same gap existed one layer up: read_source refused negative inline constants outright. A register holds thirty-two bits, so the conversion is through i32 for two's complement - -1 is 0xFFFF_FFFF, which is what the guest reads back.

Surprises.

Not done. Fidelity::Subgroup is still a stub, the Lane model is still unmasked, and control flow with the execution mask - the largest unbuilt part of D098 - is still ahead. SOPK, MTBUF and VINTRP remain transcribed-only.