D120 - Controlled-ISA: pinning the fast SFU path against the correctly-rounded one, through the precision the SPIR-V asks for

Status: derived - three relaxed-precision variant kernels (rcprelaxed, sqrtrelaxed, divrelaxed), sharing the correctly-rounded reference with their full forms; the machinery is verified as plumbing on llvmpipe, and the finding it produces waits on RDNA hardware.

The census marks the reciprocal, sqrt and division as covered, but that hides a distinction the shader gap turns on. A full-precision 1.0/x is not one instruction on RDNA - it is the correctly-rounded IEEE division sequence (v_div_scale, v_rcp, v_div_fmas, v_div_fixup). The bare v_rcp, ~1 ULP off, is a different result, and a game's shaders reach it by asking for relaxed precision. Whether an emulator must reproduce the fast path bit-for-bit or can compute the correct value depends on which the title used - so obSCEne has to probe both, not just one.

The lever is the precision decoration, not hand-written SPIR-V. A mediump reciprocal compiles to a RelaxedPrecision-decorated division (confirmed: five such decorations in rcprelaxed against zero in full rcp), which RDNA lowers to the bare fast op; the full-precision kernel gets the correct sequence. This is exactly the lever a real shader pulls, so it is more faithful than forcing an opcode by hand and less fragile - the driver honours the hint rather than being tricked past an optimiser. spirv-as is available for the cases GLSL genuinely cannot express, but the fast/correct split is not one of them.

Two honest boundaries recorded in the census as it changed: